As transistor and other component sizes become smaller and manufacturing techniques continue to improve, more functionality is being placed on single integrated circuits, or chips. The term system on a chip (SoC) generally refers to integrating all the functionality of a computer or other complex electronic systems onto a single chip. A SoC may comprise one or more memories, processors, or input/output ports, all integrated into a single chip. One way of allowing various components of a SoC to communicate is to use an on-chip network, sometimes referred to as a network-on-chip. An on-chip network is intended to replace conventional ways of communicating between electronic components in a complex system, such as conventional bus and crossbar interconnections.
Various topologies have been considered for on-chip networks, and ring topologies are sometimes used because of the relative simplicity of the routers that may be employed. For example, in a unidirectional ring network each router comprises two ports, one input port for receiving data from a first adjacent router and one output port for transmitting data to a second adjacent router. These routers occupy less area, consume less power, and can be clocked at higher frequencies compared to higher-radix on-chip routers, such as routers in mesh networks. However, ring networks may not scale well as the number of routers increases. This is because the average and worst-case packet bandwidth increase linearly with the number of routers. Network latency may be critical for a number of SoC applications that require ultra low latency communication and operate under tight power budgets.